`timescale 1ns / 1ps

// VGA Pong v1.0     Chris Fallin <cfallin@nd.edu>

module motion_clock(clk_50MHz, clk_motion);
   input clk_50MHz;
   output clk_motion;
	
	reg [17:0] cnt;
	
	initial cnt = 0;
	
	always @(posedge clk_50MHz) cnt <= cnt + 1;
	
	assign clk_motion = cnt[17];
endmodule
