This is a stripped-down version of JAMMER, the hardware-and-software
project that I (Chris Fallin) and two others built for CSE 30322,
Computer Architecture II, at Notre Dame in spring 2008. I've included
only the pieces I wrote: the simulator and assembler toolchain, and
the translation firmware. The Verilog implementation, though based on
my pipeproc core, was quite a complex job by the others in the
group. I can't claim full credit for what I have here, either -- the
debugging was a pretty involved group effort. But I feel a
pseudo-parental attachment to this baby of mine.

Briefly: JAMMER is a pipelined RISC processor with some special
support for running translated stack-machine code -- namely, a unique
indexed-register mode. This combines with a software trap mechanism
that pages the register file through the stack in main memory. We
achieved this by inserting an additional pipeline stage before
register read to rewrite the register fields of the instruction. This
strange beast runs translated code from the JAM3D architecture, as
specified in class, which is based loosely on the Java VM. I wrote the
translation firmware in about 1K lines of native JAMMER assembly, and
wrote the assembler and simulator to test it. (I had written a JAM3D
simulator for an earlier stage of the project and adapted its
backend.) The firmware performs just-in-time translation: JAM3D is a
12-bit machine, and JAMMER is 16 bits wide, so the top nibble of all
JAM3D code is 0. A 0-opcode in JAMMER is a trap to translation
firmware. The firmware writes a code segment by appending snippets for
each instruction (most translating to one or two native instructions)
and then rewrites the JAM3D code segment as a series of jumps to the
proper offsets. All branches in the translated code vector through the
original code segment, to avoid the need to track the translation
mapping directly.

There are two versions of the simulator: ``jami'' is a commandline
interface, and ``jamic'' is an ncurses UI, which is very convenient
for interactive debugging.